In any computing stonework, distance is measured in time.
Lin Tao stood ten paces from the western boundary wall. His linen traveled coat buttoned to the collar against the sterile chill of the white cube. In his right hand, he held his land-mapper metal pen. In his left, his brass tuning fork rested against his palm, ready to be struck.
In modern processor design, Lin Tao reflected silently, a CPU core can’t wait hundreds of cycles to fetch data from main system memory. It relies on a hierarchical memory pyramid: small, ultra-fast L1 caches located directly next-door to the arithmetic units, larger L2 caches per core. A shared L3 cache accessible by all cores on the die.
The physical speed of light in copper and silicon was about two hundred thousand miles per second. About two-thirds the speed of light in an empty pocket. On a microprocessor die measuring tens of tiny fractions of an inch across, a spark signal could only travel a few inches during a single gigahertz clock cycle. Memory located physically farther from the execution units was inherently slower to access.
If an item of data was already present in the cache, the processor could retrieve it in a handful of cycles.
